SH7058 Datasheet, PDF (323/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

Timer Status Register 9 (TSR9)
TSR9 indicates the channel 9 event counter compare-match status.
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
3
2
1
0
— CMF9F CMF9E CMF9D CMF9C CMF9B CMF9A
0
0
0
0
0
0
0
R R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
Note: * Only 0 can be written to clear the flag.
• Bits 15 to 6—Reserved: These bits are always read as 0. The write value should always be 0.
• Bit 5—Compare-Match Flag 9F (CMF9F): Status flag that indicates GR9F compare-match.
Bit 5: CMF9F
0
1
Description
[Clearing condition]
(Initial value)
When CMF9F is read while set to 1, then 0 is written to CMF9F
[Setting condition]
When the next edge is input while ECNT9F = GR9F
• Bit 4—Compare-Match Flag 9E (CMF9E): Status flag that indicates GR9E compare-match.
Bit 4: CMF9E
0
1
Description
[Clearing condition]
(Initial value)
When CMF9E is read while set to 1, then 0 is written to CMF9E
[Setting condition]
When the next edge is input while ECNT9E = GR9E
• Bit 3—Compare-Match Flag 9D (CMF9D): Status flag that indicates GR9D compare-match.
Bit 3: CMF9D
0
1
Description
[Clearing condition]
(Initial value)
When CMF9D is read while set to 1, then 0 is written to CMF9D
[Setting condition]
When the next edge is input while ECNT9D = GR9D
Rev. 3.0, 09/04, page 282 of 1086