SH7058 Datasheet, PDF (815/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bit 14—PF7 Mode Bit (PF7MD): Selects the function of pin PF7/WRH.
Bit 14: PF7MD
0
1
Expanded Mode
General input/output (PF7)
Upper write (WRH)
(Initial value)
Description
Single-Chip Mode
General input/output (PF7)
General input/output (PF7)
(Initial value)
• Bit 13—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 12—PF6 Mode Bit (PF6MD): Selects the function of pin PF6/WRL.
Bit 12: PF6MD
0
1
Expanded Mode
General input/output (PF6)
Lower write (WRL)
(Initial value)
Description
Single-Chip Mode
General input/output (PF6)
General input/output (PF6)
(Initial value)
• Bits 11 and 10—PF5 Mode Bits 1 and 0 (PF5MD1, PF5MD0): These bits select the function
of pin PF5/A21/POD.
Bit 11: Bit 10: Expanded Mode
PF5MD1 PF5MD0 with ROM Disabled
0
0
Address output (A21)
(Initial value)
1
Address output (A21)
1
0
Address output (A21)
1
Reserved (Do not set)
Description
Expanded Mode
with ROM Enabled
General input/output
(PF5) (Initial value)
Address output (A21)
Port output disable input
(POD)
Reserved (Do not set)
Single-Chip Mode
General input/output
(PF5) (Initial value)
General input/output
(PF5)
Port output disable
input (POD)
Reserved (Do not set)
• Bit 9—Reserved: This bit is always read as 0. The write value should always be 0.
Rev. 3.0, 09/04, page 774 of 1086