SH7058 Datasheet, PDF (1027/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

27.3.5 Advanced Timer Unit Timing and Advance Pulse Controller Timing
Table 27.10 shows advanced timer unit timing and advanced pulse controller timing.
Table 27.10 Advanced Timer Unit Timing and Advanced Pulse Controller Timing
Conditions: V_CC = PLLV_CC = 3.3 V ±0.3 V, PV_CC1 = 5.0 V ±0.5 V/3.3 V ±0.3 V,
PV_CC2 = 5.0 V ±0.5 V, AV_CC = 5.0 V ±0.5 V, AV_ref = 4.5 V to AV_CC,
V_SS = PLLV_SS = AV_SS = 0 V, T_a = –40°C to 125°C.
When PV_CC1 = 3.3 V ±0.3 V, V_CC = PV_CC1.
When writing or erasing on-chip flash memory, T_a = –40°C to 85°C.
Item
Symbol Min
Max Unit
Output compare output delay time
t_TOCD
—
Input capture input setup time
t
24
TICS
PULS output delay time
t_PLSD
–
Timer clock input setup time
t_TCKS
24
Timer clock pulse width (single edge
t_TCKWH/L
1.5
specified)
100 ns
—
ns
100 ns
—
ns
—
t_cyc
Timer clock pulse width (both edges
t
2.5
TCKWH/L
specified)
—
t
cyc
Figures
Figure 27.12
Figure 27.13
V_OH
CK
t_TOCD
Timer output
Input capture
input
V_OL
V_OL
t_TICS
PULS output
t_PLSD
Figure 27.12 ATU Input/Output Timing and APC Output Timing
Rev. 3.0, 09/04, page 986 of 1086