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SH7058 Datasheet, PDF (20/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine
Item
Page Revisions (See Manual for Details)
22.6.1 Register Configuration
813 Note amended
Table 22.9 Register Configuration
Note: Register access with an internal clock
multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
22.7.1 Register Configuration
816 Note amended
Table 22.11 Register Configuration
Note: Register access with an internal clock
multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
22.8.1 Register Configuration
819 Note amended
Table 22.13 Register Configuration
Note: Register access with an internal clock
multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
22.9.1 Register Configuration
822 Note amended
Table 22.15 Register Configuration
Note: Register access with an internal clock
multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
22.10.1 Register Configuration
824 Note amended
Table 22.17 Register Configuration
Note: Register access with an internal clock
multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
22.11.1 Register Configuration
826 Note amended
Table 22.19 Register Configuration
Note: Register access with an internal clock
multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
22.12.1 Register Configuration
828 Note amended
Table 22.21 Register Configuration
Note: Register access with an internal clock
multiplication ratio of 4 requires four or five internal
clock (φ) cycles.
23.4.1 Registers
844 Note added
Table 23.4 (1) Register Configuration
4. The registers except RAMER can be accessed only
in bytes, and the access requires four cycles. Since
RAMER is in the BSC, when it is accessed in bytes or
words, the access requires four cycles, and when it is
accessed in longwords, the access requires eight
cycles.
23.4.3 Programming/Erasing Interface 855
Parameters
(2.2) Flash user branch address setting
parameter (FUBRA: general register R5
of CPU)
Description amended
Store general registers R8 to R15 and the control
register GBR. General registers R0 to R7 are
available without storing them.
Rev. 3.0, 09/04, page xvii of xxxviii