SH7058 Datasheet, PDF (604/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• TEC/REC
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TEC TEC TEC TEC TEC TEC TEC TEC REC REC REC REC REC REC REC REC
7654321076543210
Initial Value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W*
Bit
Bit Name Initial Value R/W Description
15
TEC7
0
R/W* Transmit Error Counter
14
TEC6
0
13
TEC5
0
12
TEC4
0
R/W*
R/W*
R/W*
This register is incremented if an error is detected
during transmission as specified on the CAN
specification (see CAN specification document).
11
TEC3
0
R/W*
10
TEC2
0
R/W*
9
TEC1
0
R/W*
8
TEC0
0
R/W*
7
REC7
0
R/W* Receive Error Counter
6
REC6
0
5
REC5
0
4
REC4
0
R/W*
R/W*
R/W*
This register is incremented if an error is detected
during reception as specified on the CAN
specification (see CAN specification document).
3
REC3
0
R/W*
2
REC2
0
R/W*
1
REC1
0
R/W*
0
REC0
0
R/W*
Note: * It is only possible to write the value in test mode when MCR15 = MCR14 = 1.
16.5 HCAN Mailbox Registers
The HCAN mailbox registers control individual mailboxes. The address is mapped as follows.
Note: These registers can only be accessed in word size (16 bits).
Rev. 3.0, 09/04, page 563 of 1086