SH7058 Datasheet, PDF (805/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

21.3.10 Port E IO Register (PEIOR)
Bit: 15
14
13
12
11
10
9
8
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port E IO register (PEIOR) is a 16-bit readable/writable register that selects the input/output
direction of the 16 pins in port E. Bits PE15IOR to PE0IOR correspond to pins PE15/A15 to
PE0/A0. PEIOR is enabled when port E pins function as general input/output pins (PE15 to PE0),
and disabled otherwise.
When port E pins function as PE15 to PE0, a pin becomes an output when the corresponding bit in
PEIOR is set to 1, and an input when the bit is cleared to 0.
PEIOR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
Rev. 3.0, 09/04, page 764 of 1086