SH7058 Datasheet, PDF (186/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

Table 9.3 Address Map
• On-chip ROM enabled mode
Address
Space
H'0000 0000 to H'000F FFFF On-chip ROM
H'0010 0000 to H'001F FFFF Reserved
H'0020 0000 to H'003F FFFF CS0 space
H'0040 0000 to H'007F FFFF CS1 space
H'0080 0000 to H'00BF FFFF CS2 space
H'00C0 0000 to H'00FF FFFF CS3 space
H'0100 0000 to H'FFFE FFFF Reserved
H'FFFF 0000 to H'FFFF BFFF On-chip RAM
H'FFFF C000 to H'FFFF FFFF On-chip peripheral
module
Memory
On-chip ROM
Reserved
External space
External space
External space
External space
Reserved
On-chip RAM
On-chip peripheral
module
Size
1 MB
2 MB
4 MB
4 MB
4 MB
48 kB
16 kB
Bus Width
32 bits
8, 16 bits*¹
8, 16 bits*¹
8, 16 bits*¹
8, 16 bits*¹
32 bits
8, 16 bits
• On-chip ROM disabled mode
Address
Space
Memory
Size
Bus Width
H'0000 0000 to H'003F FFFF
H'0040 0000 to H'007F FFFF
H'0080 0000 to H'00BF FFFF
CS0 space
CS1 space
CS2 space
External space
External space
External space
4 MB
4 MB
4 MB
8, 16 bits*²
8, 16 bits*¹
8, 16 bits*¹
H'00C0 0000 to H'00FF FFFF CS3 space
External space
4 MB
8, 16 bits*¹
H'0100 0000 to H'FFFE FFFF Reserved
Reserved
H'FFFF 0000 to H'FFFF BFFF On-chip RAM
On-chip RAM
48 kB
32 bits
H'FFFF C000 to H'FFFF FFFF On-chip peripheral On-chip peripheral 16 kB
module
module
8, 16 bits
Notes: 1. Selected by on-chip register (BCR1) settings.
2. Selected by the mode pin.
Do not access reserved spaces. Operation cannot be guaranteed if they are accessed.
Rev. 3.0, 09/04, page 145 of 1086