SH7058 Datasheet, PDF (313/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bit 8—Input Capture/Compare-Match Flag 4D (IMF4D): Status flag that indicates GR4D
input capture or compare-match.
Bit 8: IMF4D
0
1
Description
[Clearing condition]
(Initial value)
When IMF4D is read while set to 1, then 0 is written to IMF4D
[Setting conditions]
• When the TCNT4 value is transferred to GR4D by an input capture signal
while GR4D is functioning as an input capture register
• When TCNT4 = GR4D while GR4D is functioning as an output compare
register
• When TCNT4 = GR4D while GR4D is functioning as a PWM mode
synchronous register
• Bit 7—Input Capture/Compare-Match Flag 4C (IMF4C): Status flag that indicates GR4C input
capture or compare-match. The flag is not set in PWM mode.
Bit 7: IMF4C
0
1
Description
[Clearing condition]
(Initial value)
When IMF4C is read while set to 1, then 0 is written to IMF4C
[Setting conditions]
• When the TCNT4 value is transferred to GR4C by an input capture signal
while GR4C is functioning as an input capture register
• When TCNT4 = GR4C while GR4C is functioning as an output compare
register
• Bit 6—Input Capture/Compare-Match Flag 4B (IMF4B): Status flag that indicates GR4B input
capture or compare-match. The flag is not set in PWM mode.
Bit 6: IMF4B
0
1
Description
[Clearing condition]
(Initial value)
When IMF4B is read while set to 1, then 0 is written to IMF4B
[Setting conditions]
• When the TCNT4 value is transferred to GR4B by an input capture signal
while GR4B is functioning as an input capture register
• When TCNT4 = GR4B while GR4B is functioning as an output compare
register
Rev. 3.0, 09/04, page 272 of 1086