SH7058 Datasheet, PDF (787/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

21.3.2 Port A Control Registers H and L (PACRH, PACRL)
Port A control registers H and L (PACRH, PACRL) are 16-bit readable/writable registers that
select the functions of the 16 multiplex pins in port A. PACRH selects the functions of the pins for
the upper 8 bits of port A, and PACRL selects the functions of the pins for the lower 8 bits.
PACRH and PACRL are initialized to H'0000 by a power-on reset (excluding a WDT power-on
reset), and in hardware standby mode. They are not initialized in software standby mode or sleep
mode.
Port A Control Register H (PACRH)
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
— PA15MD — PA14MD — PA13MD — PA12MD
0
0
0
0
0
0
0
0
R
R/W
R
R/W
R
R/W
R
R/W
Bit: 7
6
5
4
3
2
1
0
PA11MD1 PA11MD0 PA10MD1 PA10MD0 PA9MD1 PA9MD0 PA8MD1 PA8MD0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
• Bit 15—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 14—PA15 Mode Bit (PA15MD): Selects the function of pin PA15/RxD0.
Bit 14: PA15MD
0
1
Description
General input/output (PA15)
Receive data input (RxD0)
(Initial value)
• Bit 13—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 12—PA14 Mode Bit (PA14MD): Selects the function of pin PA14/TxD0.
Bit 12: PA14MD
0
1
Description
General input/output (PA14)
Transmit data output (TxD0)
(Initial value)
• Bit 11—Reserved: This bit is always read as 0. The write value should always be 0.
Rev. 3.0, 09/04, page 746 of 1086