SH7058 Datasheet, PDF (1039/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

27.3.13 UBC Trigger Timing
Table 27.18 shows UBC trigger timing.
Table 27.18 UBC Trigger Timing
Conditions: V_CC = PLLV_CC = 3.3 V ±0.3 V, PV_CC1 = 5.0 V ±0.5 V/3.3 V ±0.3 V,
PV_CC2 = 5.0 V ±0.5 V, AV_CC = 5.0 V ±0.5 V, AV_ref = 4.5 V to AV_CC,
V_SS = PLLV_SS = AV_SS = 0 V, T_a = –40°C to 125°C.
When PV_CC1 = 3.3 V ±0.3 V, V_CC = PV_CC1.
When writing or erasing on-chip flash memory, T_a = –40°C to 85°C.
Item
Symbol
Min
Max
Unit
Figures
UBCTRG delay time
t_UBCTGD
—
35
ns
Figure 27.28
V_OH
CK
t_UBCTGD
Note: See section 8.5.7, Internal Clock ( ) Multiplication Ratio and
Figure 27.28 UBC Trigger Timing
Pulse Width.
Rev. 3.0, 09/04, page 998 of 1086