SH7058 Datasheet, PDF (330/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bit 3—Input Capture/Compare-Match Interrupt Enable 1D (IME1D): Enables or disables
interrupt requests by IMF1D in TSR1A when IMF1D is set to 1.
Bit 3: IME1D
0
1
Description
IMI1D interrupt requested by IMF1D is disabled
IMI1D interrupt requested by IMF1D is enabled
(Initial value)
• Bit 2—Input Capture/Compare-Match Interrupt Enable 1C (IME1C): Enables or disables
interrupt requests by IMF1C in TSR1A when IMF1C is set to 1.
Bit 2: IME1C
0
1
Description
IMI1C interrupt requested by IMF1C is disabled
IMI1C interrupt requested by IMF1C is enabled
(Initial value)
• Bit 1—Input Capture/Compare-Match Interrupt Enable 1B (IME1B): Enables or disables
interrupt requests by IMF1B in TSR1A when IMF1B is set to 1.
Bit 1: IME1B
0
1
Description
IMI1B interrupt requested by IMF1B is disabled
IMI1B interrupt requested by IMF1B is enabled
(Initial value)
• Bit 0—Input Capture/Compare-Match Interrupt Enable 1A (IME1A): Enables or disables
interrupt requests by IMF1A in TSR1A when IMF1A is set to 1.
Bit 0: IME1A
0
1
Description
IMI1A interrupt requested by IMF1A is disabled
IMI1A interrupt requested by IMF1A is enabled
(Initial value)
Rev. 3.0, 09/04, page 289 of 1086