SH7058 Datasheet, PDF (800/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bit 2—PC1 Mode Bit (PC1MD): Selects the function of pin PC1/RxD1.
Bit 2: PC1MD
0
1
Description
General input/output (PC1)
Receive data input (RxD1)
(Initial value)
• Bit 1—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 0—PC0 Mode Bit (PC0MD): Selects the function of pin PC0/TxD1.
Bit 0: PC0MD
0
1
Description
General input/output (PC0)
Transmit data output (TxD1)
(Initial value)
21.3.8 Port D IO Register (PDIOR)
Bit: 15
—
Initial value: 0
R/W: R
14
13
12
11
10
9
8
—
PD13 PD12 PD11 PD10 PD9 PD8
IOR
IOR
IOR
IOR
IOR
IOR
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port D IO register (PDIOR) is a 16-bit readable/writable register that selects the input/output
direction of the 14 pins in port D. Bits PD13IOR to PD0IOR correspond to pins
PD13/PULS6/HTxD0/HTxD1 to PD0/TIO1A. PDIOR is enabled when port D pins function as
general input/output pins (PD13 to PD0) or timer input/output pins, and disabled otherwise.
When port D pins function as PD13 to PD0 or timer input/output pins, a pin becomes an output
when the corresponding bit in PDIOR is set to 1, and an input when the bit is cleared to 0.
PDIOR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
Rev. 3.0, 09/04, page 759 of 1086