SH7058 Datasheet, PDF (212/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bits 31–29, 27–25, 23–21, 15, 14, 11, 10, 7, 6—Reserved: These bits are always read as 0. The
write value should always be 0.
• Bit 28—Direct/Indirect Select (DI): Specifies either direct address mode operation or indirect
address mode operation for the channel 3 source address. This bit is valid only in CHCR3.
This bit is always read as 0 in CHCR0–CHCR2, and the write value should always be 0.
Bit 28: DI
0
1
Description
Direct access mode operation for channel 3
Indirect access mode operation for channel 3
(Initial value)
• Bit 24—Source Address Reload (RO): Selects whether to reload the source address initial
value during channel 2 transfer. This bit is valid only for channel 2. This bit is always read as 0
in CHCR0, CHCR1, and CHCR3, and the write value should always be 0.
Bit 24: RO
0
1
Description
Does not reload source address
Reloads source address
(Initial value)
Rev. 3.0, 09/04, page 171 of 1086