SH7058 Datasheet, PDF (724/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

(2) Prescalers
The channels incorporate dedicated prescalers, which can halt the clock signal that is input
from the first stage or divide the frequency of the clock signal by 2, 5, or 10 according to the
setting of the A/D trigger control register in the corresponding channels.
18.5.2 PWM Operation
Channels 0 and 1 can be unconditionally used as PWM timers using external output pins
(ADTO0A, ADTO0B, ADTO1A, and ADTO1B).
When the prescaler is set using the A/D trigger control register (ADTCR) thus starting the free-
running counter (ADCNT) in channels 0 and 1, the counters increment the count value until the
value matches the value in the corresponding cycle register (ADCYLR). When the ADCNT value
matches the ADCYLR value, the ADCNT value is cleared to H'0001, thus incrementing again
from H'0001. Here, the corresponding pins output 1 (0)*. When the appropriate value is set in the
duty register (ADDR) and the ADCNT matches the ADDR value, the corresponding pins output 0
(1)*. When the ADDR value is H'0000, the output does not change (0% duty). To obtain the
100% duty output, set the same values to the ADDR and ADCYLR. Note that the ADDR value
should not be greater than the ADCYLR value.
Note: * Selected by the DTSEL0A, DTSEL0B, DTSEL1A, and DTSEL1B bits in the A/D trigger
control register (ADTCR).
18.5.3 Compare Match Operation
The A/D general registers (ADGR0A, ADGR0B, ADGR1A, and ADGR1B) in channels 0 and 1
can trigger the corresponding multi-trigger A/D converters.
When the A/D trigger control register (ADTCR) is set appropriately, the free-running counter
(ADCNT) starts incrementing the count value. When the ADCNT value matches the ADGR value
that has been set previously, the compare match is generated, requesting the corresponding multi-
trigger A/D converter to start. However, no output pins are provided.
18.5.4 Multi-Trigger A/D Conversion Operation
The multi-trigger A/D conversion is the special conversion mode, in which A/D conversion on the
special channnels is performed prior to the other channels during continuous scan mode. When
using the multi-trigger A/D conversion operation, only the settings shown below are possible for
continuous scan mode; other settings are prohibited.
Rev. 3.0, 09/04, page 683 of 1086