SH7058 Datasheet, PDF (442/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

Start
Select counter clock 1
Set port-ATU-II connection 2
Set input waveform edge
detection
3
Start counter
4
1. Select the first-stage counter clock ' in prescaler register
(PSCR) and the second-stage counter clock " with the
CKSEL bit in the timer control register (TCR). When
selecting an external clock, also select the external clock
edge type with the CKEG bit in TCR.
2. Set the port control register, corresponding to the port for
signal input as the input capture trigger, to ATU input
capture input.
3. Select rising edge, falling edge, or both edges as the input
capture signal input edge(s) with the timer I/O control
register (TIOR).
If necessary, a timer interrupt request can be sent to the
CPU on input capture by making the appropriate setting in
the interrupt enable register (TIER). In channel 0, setting the
DMAC allows DMAC activation to be performed.
4. Set the corresponding bit to 1 in the timer start register
(TSTR) to start the free-running counter (TCNT) for the
relevant channel.
Note: When input capture occurs, the counter value is always
captured, irrespective of free-running counter (TCNT)
activation.
Input capture operation
Figure 11.53 Sample Setup Procedure for Input Capture
Rev. 3.0, 09/04, page 401 of 1086