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SH7058 Datasheet, PDF (1034/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine
tCONV
tD
tSPL
Write cycle A/D synchronization time
(3 states)
(up to 14 states)
CK
Address
Analog input
sampling signal
ADF
VOH
CK
ADEND
tADENDD
VOH
tADENDD
Figure 27.20 Analog Conversion Timing
Rev. 3.0, 09/04, page 993 of 1086