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SH7058 Datasheet, PDF (80/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine
Table 2.8 Addressing Modes and Effective Addresses (cont)
Addressing
Mode
Instruction
Format
Effective Address Calculation
Indirect indexed @(R0, Rn) The effective address is the Rn value plus R0.
register
addressing
Rn
+
Rn + R0
Equation
Rn + R0
R0
Indirect GBR
addressing with
displacement
@(disp:8, The effective address is the GBR value plus an Byte: GBR +
GBR)
8-bit displacement (disp). The value of disp is zero- disp
extended, and remains the same for a byte opera-
tion, is doubled for a word operation, and is
quadrupled for a longword operation.
Word: GBR +
disp × 2
Longword:
GBR
GBR + disp ×
disp
(zero-extended)
+
GBR
4
+ disp × 1/2/4
×
Indirect indexed @(R0,
GBR addressing GBR)
1/2/4
The effective address is the GBR value plus R0.
GBR
+
GBR + R0
GBR + R0
R0
Indirect PC
addressing with
displacement
@(disp:8, The effective address is the PC value plus an 8-bit Word: PC +
PC)
displacement (disp). The value of disp is zero-
disp × 2
extended, and is doubled for a word operation, and Longword:
quadrupled for a longword operation. For a
PC &
longword†operation, the lowest two bits of the PC H'FFFFFFFC
value are masked.
+ disp × 4
PC
(for longword)
&
H'FFFFFFFC
+
disp
(zero-extended)
×
PC + disp × 2
or
PC & H'FFFFFFFC
+ disp × 4
2/4
Rev. 3.0, 09/04, page 39 of 1086