SH7058 Datasheet, PDF (301/1130 Pages) Renesas Technology Corp – Renesas SuperHTM RISC engine

• Bit 8—Overflow Flag 1A (OVF1A): Status flag that indicates TCNT1A overflow.
Bit 8: OVF1A
0
1
Description
[Clearing condition]
(Initial value)
When OVF1A is read while set to 1, then 0 is written to OVF1A
[Setting condition]
When the TCNT1A value overflows (from H'FFFF to H'0000)
• Bit 7—Input Capture/Compare-Match Flag 1H (IMF1H): Status flag that indicates GR1H
input capture or compare-match.
Bit 7: IMF1H
0
1
Description
[Clearing condition]
(Initial value)
When IMF1H is read while set to 1, then 0 is written to IMF1H
[Setting conditions]
• When the TCNT1A value is transferred to GR1H by an input capture
signal while GR1H is functioning as an input capture register
• When TCNT1A = GR1H while GR1H is functioning as an output compare
register
• Bit 6—Input Capture/Compare-Match Flag 1G (IMF1G): Status flag that indicates GR1G
input capture or compare-match.
Bit 6: IMF1G
0
1
Description
[Clearing condition]
(Initial value)
When IMF1G is read while set to 1, then 0 is written to IMF1G
[Setting conditions]
• When the TCNT1A value is transferred to GR1G by an input capture
signal while GR1G is functioning as an input capture register
• When TCNT1A = GR1G while GR1G is functioning as an output compare
register
Rev. 3.0, 09/04, page 260 of 1086