SH7032 Datasheet, PDF (82/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 4 Exception Handling
Table 4.3 Calculation of Exception Vector Table Addresses
Exception Source
Calculation of Vector Table Address
Reset
(Vector table address) = (vector table address offset) =
(vector number) × 4
Address error, interrupt, instructions (Vector table address) = VBR + (vector table address
offset) = VBR + (vector number) × 4
Note: VBR: Vector base register. For vector table address offsets and vector numbers, see table
4.2.
4.2 Resets
4.2.1 Reset Types
A reset is the highest-priority exception. There are two types of reset: power-on reset and manual
reset. As table 4.4 shows, a power-on reset initializes the internal state of the CPU and all registers
of the on-chip supporting modules. A manual reset initializes the internal state of the CPU and all
registers of the on-chip supporting modules except the bus state controller (BSC), pin function
controller (PFC), and I/O ports (I/O).
Table 4.4 Reset Types
Reset
Power-on Reset
Manual Reset
Transition Conditions
NMI
RES
High
Low
Low
Low
CPU
Initialized
Initialized
Internal State
On-Chip Supporting Modules
Initialized
All initialized except BSC, PFC, and I/O
Rev. 7.00 Jan 31, 2006 page 56 of 658
REJ09BX0272-0700