SH7032 Datasheet, PDF (398/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Serial Communication Interface (SCI)
Table 13.4 Bit Rates and BRR Settings in Synchronous Mode
φ (MHz)
Bit Rate
2
(bits/s) n
N
4
n
N
8
n
N
10
n
N
110
3
70 — — — — — —
250
2
124 2
249 3
124 — —
500
1
249 2
124 2
249 — —
1k
1
124 1
249 2
124 — —
2.5k
0
199 1
99 1
199 1
249
5k
0
99 0
199 1
99 1
124
10k
0
49 0
99 0
199 0
249
25k
0
19 0
39 0
79 0
99
50k
0
9
0
19 0
39 0
49
100k
0
4
0
9
0
19 0
24
250k
0
1
0
3
0
7
0
9
500k
0
0* 0
1
0
3
0
4
1M
0
0* 0
1
——
2.5M
——0
0*
5M
Blank: No setting available
—: Setting possible, but error occurs
*:
Continuous transmission/reception not possible
The BRR setting is calculated as follows:
Asynchronous mode
N = [φ/(64 × 2^{2n – 1} × B)] × 10⁶ – 1
Synchronous mode
N = [φ/(8 × 2^{2n – 1} × B)] × 10⁶ – 1
B: Bit rate (bits/s)
N: BRR setting for baud rate generator (0 ≤ N ≤ 255)
φ: φ frequency (MHz)
n: Baud rate generator clock source (n = 0, 1, 2, 3)
For the clock sources and values of n, see following table.
16
20
n
N
n
N
————
3
249 — —
3
124 — —
2
249 — —
2
99 2
124
1
199 1
249
1
99 1
124
0
159 0
199
0
79 0
99
0
39 0
49
0
15 0
19
0
7
0
9
0
3
0
4
——0
1
——0
0*
Rev. 7.00 Jan 31, 2006 page 372 of 658
REJ09B0272-0700