SH7032 Datasheet, PDF (303/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
Complementary PWM Mode Operation: Figure 10.34 shows an example of operation in
complementary PWM mode. TCNT3 and TCNT4 operate as up/down-counters, counting down
from compare match of TCNT3 and GRA3 and counting up when TCNT4 underflows. PWM
waveforms are output by repeated compare matches with GRB3, GRA4, and GRB4 in the
sequence TCNT3, TCNT4, TCNT4, TCNT3 (in this mode, TCNT3 starts out at a higher value
than TCNT4).
Figure 10.35 shows examples of PWM waveforms with 0% and 100% duty cycles (in one phase)
in complementary PWM mode. In this example, the pin output changes upon GRB3 compare
match, so duty cycles of 0% and 100% can be obtained by setting GRB3 to a value larger than
GRA3. Combining buffer operation with the above operation makes it easy to change the duty
while operating. See section 10.4.8, Buffer Mode, for details.
TCNT3, TCNT4 value
GRA3
GRB3
Down-counting starts at compare match
between TCNT3 and GRA3
TCNT3
GRA4
GRB4
TIOCA3
TCNT4
Time
Up-counting starts at TCNT4 underflow
TIOCB3
TIOCA4
TOCXA4
TIOCB4
TOCXB4
Figure 10.34 Complementary PWM Mode Operation Example 1
Rev. 7.00 Jan 31, 2006 page 277 of 658
REJ09B0272-0700