SH7032 Datasheet, PDF (597/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
Table A.5 SCR Bit Functions
Bit Bit Name
Value Description
7 Transmit interrupt 0
enable (TIE)
Transmit data-empty interrupt request (TXI) disabled
(Initial value)
1
Transmit data-empty interrupt request (TXI) enabled
6 Receive interrupt
0
enable (RIE)
Receive-data-full interrupt request (RXI) and receive-error
interrupt request (ERI) disabled
(Initial value)
1
Receive-data-full interrupt request (RXI) and receive-error
interrupt request (ERI)
5 Transmit enable (TE) 0
Transmission disabled
(Initial value)
1
Transmission enabled
4 Receive enable (RE) 0
Reception disabled
(Initial value)
1
Reception enabled
3 Multiprocessor inter- 0
rupt enable (MPIE)
Multiprocessor interrupts disabled (normal receive operation)
(Initial value)
Clear conditions: (1) MPIE bit cleared to zero; (2) When data
the MPB = 1 is received
1
Multiprocessor interrupts enabled. Disables receive interrupts
(RXI), receive error interrupts (ERI), and setting of RDRF,
FER, and ORER flags in SSR until data with a “1”
multiprocessor bit is received
2 Transmit end inter- 0
rupt enable (TEIE) ₁
Transmit interrupt requests (TEI) disabled
Transmit interrupt requests (TEI) enabled
(Initial value)
1 Clock enable 1
(CKE1)
0 0 Asynchronous
mode
Internal clock/SCK pin is input pin (input
signal ignored) or output pin (output level
undetermined)
(Initial value)
Synchronous
mode
Internal clock/SCK pin is synchronous
clock output
(Initial value)
0 1 Asynchronous
mode
Internal clock/SCK pin is clock output
Synchronous
mode
Internal clock/SCK pin is serial clock
output
0 Clock enable 0
(CKE0)
1 0 Asynchronous
mode
External clock/SCK pin is clock input
Synchronous
mode
External clock/SCK pin is serial clock
input
1 1 Asynchronous
mode
External clock/SCK pin is clock input
Synchronous
mode
External clock/SCK pin is serial clock
input
Rev. 7.00 Jan 31, 2006 page 571 of 658
REJ09B0272-0700