SH7032 Datasheet, PDF (513/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

CK
A21–A0
HBS, LBS
CSn
RD
(Read)
AD15–AD0
DPH, DPL
(Read)
DACK0
DACK1
(Read)
WRH, WRL,
WR (Write)
AD15–AD0
DPH, DPL
(Write)
DACK0
DACK1
(Write)
WAIT
Section 20 Electrical Characteristics
T₁
T_W
T₂
t_RDAC2^*1
t_ACC2^*2
t_WTS t_WTH
t_WTS t_WTH
Notes: 1. For t_RDAC2, use t_cyc × (n+1.65) – 20 (for 35% duty) or t_cyc × (n+1.5) – 20 (for 50%
duty) instead of t_cyc × (n+2) – t_RDD – t_RDS.
2. For t_ACC2, use t_cyc × (n+2) – 30 instead of t_cyc × (n+2) – t_AD (or t_CSD1) – t_RDS.
Figure 20.10 Basic Bus Cycle: Two States + Wait State
Rev. 7.00 Jan 31, 2006 page 487 of 658
REJ09B0272-0700