SH7032 Datasheet, PDF (681/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix B Pin States
External Memory Space
16-Bit Space
WRH, WRL, A0 System
WR, HBS, LBS System
Pin Name
8-Bit Upper
Space Byte
Lower
Byte
Word
Upper
Byte
Lower
Byte
Word
CS7–CS0
Valid Valid
Valid
Valid
Valid
Valid
Valid
RAS
High
High
High
High
High
High
High
CASH
High
High
High
High
High
High
High
CASL
High
High
High
High
High
High
High
AH
Low
Low
Low
Low
Low
Low
Low
RD
R Low
Low
Low
Low
Low
Low
Low
W High
High
High
High
High
High
High
WRH/LBS R —*
High
High
High
High
Low
Low
W —*
Low
High
Low
High
Low
Low
WRL/WR R High
High
High
High
High
High
High
W Low
High
Low
Low
Low
Low
Low
A0/HBS
A0
A0
A0
A0
Low
High
Low
A21–A1
Address Address Address Address Address Address Address
AD15–AD8
High-Z Data
High-Z Data
Data
High-Z Data
AD7–AD0
Data
High-Z
Data
Data
High-Z Data
Data
DPH
High-Z Parity
High-Z Parity
Parity
High-Z Parity
DPL
Parity High-Z
Parity
Parity
High-Z
Parity
Parity
R: Read
W: Write
Valid: Chip select signal for the area accessed is low; other chip select signals are high.
Parity: When an area 2 parity check is selected with the parity check enable bits (PCHK1, PCHK0)
in the parity control register (PCR), this pin is used as the parity pin.
Note: * Cannot be used; available only for 16-bit space access.
Rev. 7.00 Jan 31, 2006 page 655 of 658
REJ09B0272-0700