SH7032 Datasheet, PDF (674/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
Reset State
Category
Abbreviation Power On Manual
16-bit integrated timer pulse TSTR
unit (ITU)
TSNC
Initialized Initialized
TMDA, TMDB
TCNT0–TCNT4
GRA0–GRA4,
GRB0–GRB4
BRA3, BRA4.
BRB3, BRB4
TCR0–TCR4
TIOR0–TIOR4
TIER0–TIER4
TSR0–TSR4
Programmable timing
pattern controller (TPC)
TPMR
TPCR
Initialized Initialized
NDERA,NDERB
NDRA, NDRB
Watchdog timer (WDT)
TCNT
Initialized Initialized
TCSR
RSTCR*²
Serial communication
interface (SCI)
SMR
BRR
Initialized Initialized
SCR
TDR
TSR
SSR
RDR
RSR
Power-Down State
Standby Sleep
Initialized Held
Held
Held
Held
*¹
Initialized
Initialized
Held
Held
Held
Initialized
Held
Rev. 7.00 Jan 31, 2006 page 648 of 658
REJ09B0272-0700