SH7032 Datasheet, PDF (657/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
Table A.60 PACR1 Bit Functions
Bit Bit Name
15,14 PA15 mode bits 1,0
(PA15MD1, PA15MD0)
13,12 PA14 mode bits 1,0
(PA14MD1, PA14MD0)
11,10 PA13 mode bits 1,0
(PA13MD1, PA13MD0)
9,8 PA12 mode bits 1,0
(PA12MD1, PA12MD0)
7,6 PA11 mode bits 1,0
(PA11MD1, PA11MD0)
5,4 PA10 mode bits 1,0
(PA10MD1, PA10MD0)
3,2 PA9 mode bits 1,0
(PA9MD1, PA9MD0)
0
PA8 mode bit (PA8MD)
Value
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
0
1
Description
General-purpose input/output (PA15)
(Initial value)
Interrupt request input (IRQ3)
Reserved
DMA transfer request input (DREQ1)
General-purpose input/output (PA14)
Interrupt request input (IRQ2)
Reserved
DMA transfer request acknowledge output (DACK1)
(Initial value)
General-purpose input/output (PA13)
(Initial value)
Interrupt request input (IRQ1)
ITU timer clock input (TCLKB)
DMA transfer request input (DREQ0)
General-purpose input/output (PA12)
Interrupt request input (IRQ0)
ITU timer clock input (TCKLA)
DMA transfer request acknowledge output (DACK0)
(Initial value)
General-purpose input/output (PA11)
(Initial value)
High data bus parity input/output (DPH)
ITU input capture input/output compare output (TIOCB1)
Reserved
General-purpose input/output (PA10)
(Initial value)
Low data bus parity input/output (DPL)
ITU input capture input/output compare output (TIOCA1)
Reserved
General-purpose input/output (PA9)
(Initial value)
Address hold output (AH)
A/D conversion trigger input (ADTRG)
Interrupt request output (IRQOUT)
General-purpose input/output (PA8)
(Initial value)
Bus request input (BREQ)
Rev. 7.00 Jan 31, 2006 page 631 of 658
REJ09B0272-0700