SH7032 Datasheet, PDF (226/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 9 Direct Memory Access Controller (DMAC)
Transfer request Waiting channel(s) DMAC operation
Channel priority
(1) Channels
0 and 1
(2) Channel 1
transfer starts
3>2>1>0
0
Priority order
(3) Channel 1
transfer ends
changes
3>2>0>1
(6) Channel 0
None
(4) Channel 0
transfer starts
(5) Channel 0
transfer ends
Priority order
changes
3>2>1>0
(7) Channel 0
transfer starts
Waiting for
transfer request
None
Priority order
(8) Channel 0
does not change
3>2>1>0
transfer ends
Figure 9.5 Example of Changes in Priority in External-Pin Round-Robin Mode
Rev. 7.00 Jan 31, 2006 page 200 of 658
REJ09B0272-0700