SH7032 Datasheet, PDF (632/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
A.2.36 Break Address Register L (BARL)
Start Address: H'5FFFF92
Bus Width: 8/16/32
Bit
Initial value
Read/Write
15
14
13
12
11
10
9
BA15 BA14 BA13 BA12 BA11 BA10 BA9
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
UBC
8
BA8
0
R/W
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
BA7
BA6
BA5
BA4
BA3
BA2
BA1
BA0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table A.37 BARL Bit Functions
Bit
15–0
Bit name
Set break address bits 15–0
(BA15–BA0)
Description
Specifies the lower end (bits 15–0) of the address
which is the break condition
Rev. 7.00 Jan 31, 2006 page 606 of 658
REJ09B0272-0700