SH7032 Datasheet, PDF (37/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 1 Overview
1.3.2 Pin Functions
Table 1.3 describes the pin functions.
Table 1.3 Pin Functions
Type
Pin No. Pin No.
(PRQP0112 (PTQP0120
Symbol JA-A)
LA-A)
I/O Name and Function
Power V_CC
15, 43, 70, 16, 46, 75, I
75, 77*, 83, 80, 82*, 88,
84, 99
89, 106
Power: Connected to the power supply.
Connect all V_CC pins to the system power
supply . The chip will not operate if any V_CC pin
is left unconnected.
V_SS
3, 12, 22, 4, 13, 23, I Ground: Connected to ground. Connect all V_SS
31, 40, 52, 34, 43, 55,
pins to the system ground. The chip will not
61, 72, 96, 66, 77, 102,
106
113
operate if any V_SS pin is left unconnected.
V_PP
77*
82*
I PROM programming power supply: Connected
to the power supply (V_CC) during normal
operation. Apply +12.5 V when programming
the PROM in the SH7034 (PROM version).
Clock
EXTAL 73
78
I External clock: Connected to a crystal
resonator or external clock input having the
same frequency as the system clock (CK).
XTAL 74
79
I Crystal: Connected to a crystal resonator with
the same frequency as the system clock (CK).
If an external clock is input at the EXTAL pin,
leave XTAL open.
CK
71
76
O System clock: Supplies the system clock (CK)
to peripheral devices.
System RES 79
84
I Reset: Low input causes a power-on reset if
control
NMI is high, or a manual reset if NMI is low.
WDTOVF 78
83
O Watchdog timer overflow: Overflow output
signal from the watchdog timer.
BREQ 62
67
I Bus request: Driven low by an external device
to request bus ownership.
BACK 60
65
O Bus request acknowledge: Indicates that bus
ownership has been granted to an external
device. By receiving the BACK signal, a device
that has sent a BREQ signal can confirm that it
has been granted the bus.
Note: * Pin 77 is V_CC in the SH7032 and SH7034 (masked ROM version), and V_PP in the SH7034
(PROM version).
Rev. 7.00 Jan 31, 2006 page 11 of 658
REJ09B0272-0700