SH7032 Datasheet, PDF (262/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
Bits 7–5 Reserved: Bit 7 is read as undefined. Bits 6 and 5 are always read as 1. The write value
to bit 7 should be 0 or 1, and the write value to bits 6 and 5 should always be 1.
Bit 4—Timer Synchro 4 (SYNC4): SYNC4 selects synchronizing mode for channel 4.
Bit 4: SYNC4
0
1
Description
The timer counter for channel 4 (TCNT4) operates independently (Preset/clear
of TCNT4 is independent of other channels)
(Initial value)
Channel 4 operates synchronously. Synchronized preset/clear of TNCT4
enabled.
Bit 3—Timer Synchro 3 (SYNC3): SYNC3 selects synchronizing mode for channel 3.
Bit 3: SYNC3
0
1
Description
The timer counter for channel 3 (TCNT3) operates independently (Preset/clear
of TCNT3 is independent of other channels)
(Initial value)
Channel 3 operates synchronously. Synchronized preset/clear of TNCT3
enabled.
Bit 2—Timer Synchro 2 (SYNC2): SYNC2 selects synchronizing mode for channel 2.
Bit 2: SYNC2
0
1
Description
The timer counter for channel 2 (TCNT2) operates independently (Preset/clear
of TCNT2 is independent of other channels)
(Initial value)
Channel 2 operates synchronously. Synchronized preset/clear of TNCT2
enabled.
Bit 1—Timer Synchro 1 (SYNC1): SYNC1 selects synchronizing mode for channel 1.
Bit 1: SYNC1
0
1
Description
The timer counter for channel 1 (TCNT1) operates independently (Preset/clear of
TCNT1 is independent of other channels)
(Initial value)
Channel 1 operates synchronously. Synchronized preset/clear of TNCT1
enabled.
Rev. 7.00 Jan 31, 2006 page 236 of 658
REJ09B0272-0700