SH7032 Datasheet, PDF (393/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Serial Communication Interface (SCI)
Bit 1—Multiprocessor Bit (MPB): MPB stores the value of the multiprocessor bit in receive data
when a multiprocessor format is selected for receiving in asynchronous mode. The MPB is a read-
only bit and cannot be written.
Bit 1: MPB
0
1
Description
Multiprocessor bit value in receive data is 0
(Initial value)
If RE is cleared to 0 when a multiprocessor format is selected, MPB retains its
previous value.
Multiprocessor bit value in receive data is 1
Bit 0—Multiprocessor Bit Transfer (MPBT): MPBT stores the value of the multiprocessor bit
added to transmit data when a multiprocessor format is selected for transmitting in asynchronous
mode. The MPBT setting is ignored in synchronous mode, when a multiprocessor format is not
selected, or when the SCI is not transmitting.
Bit 0: MPBT
0
1
Description
Multiprocessor bit value in transmit data is 0
Multiprocessor bit value in transmit data is 1
(Initial value)
13.2.8 Bit Rate Register (BRR)
The bit rate register (BRR) is an eight-bit register that, together with the baud rate generator clock
source selected by the CKS1 and CKS0 bits in the serial mode register (SMR), determines the
serial transmit/receive bit rate.
The CPU can always read and write to BRR. BRR is initialized to H'FF by a reset and in standby
mode. SCI0 and SCI1 have independent baud rate generator control, so different values can be set
in the two channels.
Bit
7
6
5
4
3
2
1
0
Initial value
Read/Write
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 13.3 shows examples of BRR settings in asynchronous mode; table 13.4 shows examples of
BBR settings in synchronous mode.
Rev. 7.00 Jan 31, 2006 page 367 of 658
REJ09B0272-0700