SH7032 Datasheet, PDF (670/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
A.2.70 Next Data Register A (NDRA)
(When the Output Triggers of TPC Output Groups 0 and 1 are Different)
Start Address: H'5FFFFF5
Bus Width: 8/16
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
NDR7 NDR6 NDR5 NDR4
—
—
—
0
0
0
0
1
1
1
R/W
R/W
R/W
R/W
—
—
—
TPC
0
—
1
—
Table A.71 NDRA Bit Functions
Bit Bit Name
7–4 Next data 7–4 (NDR7–
NDR4)
Description
Stores the next output data for TPC output group 1
A.2.71 Next Data Register A (NDRA)
(When the Output Triggers of TPC Output Groups 0 and 1 are Different)
TPC
Start Address: H'5FFFFF7
Bus Width: 8/16
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
—
—
—
NDR3 NDR2 NDR1 NDR0
1
1
1
1
0
0
0
0
—
—
—
—
R/W
R/W
R/W
R/W
Table A.72 NDRA Bit Functions
Bit Bit Name
3–0 Next data 3–0 (NDR3–
NDR0)
Description
Stores the next output data for TPC output group 0
Rev. 7.00 Jan 31, 2006 page 644 of 658
REJ09B0272-0700