SH7032 Datasheet, PDF (334/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
Table 10.21 ITU Operating Modes (Channel 3)
Register Setting
TSNC
TMDR
TFCR
TOCR
TIOR3
TCR3
Reset
Output
Operating
Comp Sync
Level
Mode
Sync MDF FDIR PWM PWM PWM Buffer Select IOA
IOB
Clear Clock
Select Select
Synch- SYNC3 — — √
√*² √
√
—
√
√
ronized = 1
preset
√
√
PWM
√
— — PWM3 CMD1 CMD1 √
—
—
√*¹
√
√
mode
=1 =0 =0
Output √
compare A
function
——
PWM3 CMD1 CMD1 √
=0 =0 =0
—
IOA2 = 0, √
others:
don’t care
√
√
Output √
compare B
function
—— √
CMD1 CMD1 √
=0 =0
—
√
IOB2 = 0, √
√
others:
don’t care
Input
√
capture A
function
——
PWM3 CMD1 CMD1 √
=0 =0 =0
—
IOA2 = 1, √
others:
don’t care
√
√
Input
√
capture B
function
——
PWM3 CMD1 CMD1 √
=0 =0 =0
—
√
IOB2 = 1, √
√
others:
don’t care
Counter Clear Function
Clear at √
—— √
CMD1 √*³ √
—
√
√
compare
= 1,
match/
CMD0
input
=0
capture A
inhib-
ited
CCLR1 √
=0
CCLR0
=1
Clear at √
—— √
CMD1 CMD1 √
—
√
√
compare
=0 =0
match/
input
capture B
CCLR1 √
=1
CCLR0
=0
Synch- SYNC3 — — √
CMD1 √
√
—
√
√
ronized = 1
= 1,
clear
CMD0
=0
inhib-
ited
CCLR1 √
=1
CCLR0
=1
Rev. 7.00 Jan 31, 2006 page 308 of 658
REJ09B0272-0700