SH7032 Datasheet, PDF (470/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 15 Pin Function Controller (PFC)
Bits 1 and 0—PB0 Mode (PB0MD1 and PB0MD0): PB0MD1 and PB0MD0 select the function
of the PB0/TP0/TIOCA2 pin.
Bit 1:
PB0MD1
0
1
Bit 0:
PB0MD0
0
1
0
1
Function
Input/output (PB0)
Reserved
ITU input capture/output compare (TIOCA2)
Timing pattern output (TP0)
(Initial value)
15.3.5 Column Address Strobe Pin Control Register (CASCR)
CASCR is a 16-bit read/write register that allows selection between column address strobe and
chip select pin functions. CASCR is initialized to H'5FFF by a power-on reset, but is not
initialized by a manual reset, or in standby mode or sleep mode.
Bit
Initial value
Read/Write
15
14
13
12
11
10
9
8
CASH CASH CASL CASL
—
—
—
—
MD1 MD0 MD1 MD0
0
1
0
1
1
1
1
1
R/W R/W R/W R/W
—
—
—
—
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
1
1
1
1
1
1
1
1
—
—
—
—
—
—
—
—
Bits 15 and 14—CASH Mode (CASHMD1 and CASHMD0): CASHMD1 and CASHMD0
select the function of the CS1/CASH pin.
Bit 15:
CASHMD1
0
1
Bit 14:
CASHMD0
0
1
0
1
Function
Reserved
Chip select output (CS1)
Column address strobe output (CASH)
Reserved
(Initial value)
Rev. 7.00 Jan 31, 2006 page 444 of 658
REJ09B0272-0700