SH7032 Datasheet, PDF (558/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 20 Electrical Characteristics
Item
Write data delay time 1
Symbol Min
t_WDD1 —
Max Unit
35 ns
Write data delay time 2
t_WDD2 —
20 ns
Write data hold time
t_WDH
0
— ns
Parity output delay time 1 t_WPDD1 —
40 ns
Parity output delay time 2 t_WPDD2 —
20 ns
Parity output hold time
t_WPDH 0
— ns
Wait setup time
t_WTS
10
— ns
Wait hold time
t_WTH
6
— ns
Read data access time 1*⁶ t_ACC1
t_cyc – 30*⁴
— ns
Read data access time 2*⁶ t_ACC2
t_cyc × (n+2) – 30*³ —
ns
RAS delay time 1
RAS delay time 2
CAS delay time 1
CAS delay time 2*⁷
CAS delay time 3*⁷
Column address setup time
Read data access 35%
time from CAS 1*⁶ duty*²
t_RASD1
t_RASD2
t_CASD1
t_CASD2
t_CASD3
t_ASC
t_CAC1
—
—
—
—
—
0
t_cyc × 0.65 –19
20 ns
30 ns
20 ns
20 ns
20 ns
— ns
— ns
50% duty
t_cyc × 0.5 – 19
— ns
Read data access time from
CAS 2*⁶
t_CAC2
t_cyc × (n+1) – 25*³ —
ns
Read data access time from
RAS 1*⁶
t_RAC1
t_cyc × 1.5 – 20
— ns
Read data access time from
RAS 2*⁶
t_RAC2
t_cyc × (n+2.5)– 20*³ —
ns
High-speed page mode CAS t_CP
precharge time
t_cyc × 0.25
— ns
Figures
20.53, 20.57, 20.58,
20.63
20.55, 20.56
20.53, 20.55–20.58
20.53, 20.57, 20.58
20.55, 20.56
20.53, 20.55–20.58
20.54, 20.59, 20.63
20.52, 20.55, 20.56
20.53, 20.54, 20.57–
20.59
20.55–20.58,
20.60–20.62
20.55
20.57, 20.58,
20.60–20.62
20.55, 20.56
20.57–20.59
20.55, 20.56
20.57–20.59
20.56
Rev. 7.00 Jan 31, 2006 page 532 of 658
REJ09B0272-0700