SH7032 Datasheet, PDF (135/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8.2 Register Descriptions
Section 8 Bus State Controller (BSC)
8.2.1 Bus Control Register (BCR)
The bus control register (BCR) is a 16-bit read/write register that selects the functions of areas and
status of bus cycles. It is initialized to H'0000 by a power-on reset, but is not initialized by a
manual reset or in standby mode.
Bit
Initial value
Read/Write
15
14
13
12
11
10
9
8
DRAME IOE WARP RDDTY BAS
—
—
—
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
—
—
—
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
0
0
0
0
0
0
0
0
—
—
—
—
—
—
—
—
Bit 15—DRAM Enable Bit (DRAME): DRAME selects whether area 1 is used as an external
memory space or DRAM space. 0 sets it as external memory space and 1 sets it as DRAM space.
The setting of the DRAM area control register is valid only when this bit is set to 1.
Bit 15: DRAME
0
1
Description
Area 1 is external memory space
Area 1 is DRAM space
(Initial value)
Bit 14—Multiplexed I/O Enable Bit (IOE): IOE selects whether area 6 is used as external
memory space or an address/data multiplexed I/O area. 0 sets it as external memory space and 1
sets it as address/data multiplexed I/O space. With address/data multiplexed I/O space, the address
and data are multiplexed and input/output is from AD15–AD0.
Bit 14: IOE
0
1
Description
Area 6 is external memory space
Area 6 is an address/data multiplexed I/O area
(Initial value)
Rev. 7.00 Jan 31, 2006 page 109 of 658
REJ09B0272-0700