SH7032 Datasheet, PDF (178/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 8 Bus State Controller (BSC)
T_p
T_r
T_c
CK
A21–A0
Row address Column address
RAS
Byte
control
CASH
CASL
WRH
WRL
High
Fixed high
(a) Dual CAS signals (CW2 = 0)
T_p
T_r
T_c
CK
A21–A0
Row address Column address
RAS
CASH
CASL
Fixed high
Byte
control
WRH
WRL
High
(b) Dual WE signals (CW2 = 1)
Figure 8.21 Byte Access Control Timing for DRAM Access
(Upper Byte Write Cycle, Short Pitch)
Rev. 7.00 Jan 31, 2006 page 152 of 658
REJ09B0272-0700