SH7032 Datasheet, PDF (457/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 15 Pin Function Controller (PFC)
15.2 Register Configuration
Table 15.2 summarizes the registers of the pin function controller.
Table 15.2 Pin Function Controller Registers
Name
Abbreviation R/W Initial Value Address*
Access Size
Port A I/O register
PAIOR
R/W H'0000
H'5FFFFC4 8, 16, 32
Port A control register 1 PACR1
R/W H'3302
H'5FFFFC8 8, 16, 32
Port A control register 2 PACR2
R/W H'FF95
H'5FFFFCA 8, 16, 32
Port B I/O register
PBIOR
R/W H'0000
H'5FFFFC6 8, 16, 32
Port B control register 1 PBCR1
R/W H'0000
H'5FFFFCC 8, 16, 32
Port B control register 2 PBCR2
R/W H'0000
H'5FFFFCE 8, 16, 32
Column address strobe CASCR
pin control register
R/W H'5FFF
H'5FFFFEE 8, 16, 32
Note: * Only the values of bits A27–A24 and A8–A0 are valid; bits A23–A9 are ignored. For details
on the register addresses, see section 8.3.5, Area Descriptions.
15.3 Register Descriptions
15.3.1 Port A I/O Register (PAIOR)
The port A I/O register (PAIOR) is a 16-bit read/write register that selects input or output for the
16 pins of port A. Bits PA15IOR–PA0IOR correspond to pins PA15/IRQ3/DREQ1–
PA0/CS4/TIOCA0. PAIOR is enabled when the port A pins function as input/outputs (PA15–
PA0) and for ITU input capture and output compare (TIOCA1, TIOCA0, TIOCB1, and TIOCB0).
For other functions, they are disabled. For port A pin functions PA15–PA0 and TIOCA1,
TIOCA0, TIOCB1, and TIOCB0, a given pin in port A is an output pin if its corresponding
PAIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PAIOR is initialized to H'0000 by a power-on reset; however, it is not initialized by a manual
reset, or in standby mode or sleep mode.
Bit
Initial value
Read/Write
15
14
13
12
11
10
9
8
PA15 PA14 PA13 PA12 PA11 PA10 PA9
PA8
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 7.00 Jan 31, 2006 page 431 of 658
REJ09B0272-0700