SH7032 Datasheet, PDF (362/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 11 Programmable Timing Pattern Controller (TPC)
11.4 Usage Notes
11.4.1 Non-Overlap Operation
During non-overlap operation, transfers from NDR to data registers (DR) occur as follows.
1. NDR contents are always transferred to DR on compare match A.
2. The contents of bits transferred from NDR are only transferred on compare match B when
they are 0. No transfer occurs for a 1.
Figure 11.9 illustrates TPC output during non-overlap operation.
CR
NDER
Q
Q
Compare match A
Compare match B
Port function
select
C
Q DR D
Q NDR D
TPC output pin
Figure 11.9 TPC Output Non-Overlap Operation
Rev. 7.00 Jan 31, 2006 page 336 of 658
REJ09B0272-0700