SH7032 Datasheet, PDF (300/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
Reset-Synchronized PWM Mode Operation: Figure 10.32 shows an example of operation in
reset-synchronized PWM mode. TCNT3 operates as an up-counter that is cleared to H'0000 at
compare match with GRA3. TCNT4 runs independently and is isolated from GRA4 and GRB4.
The PWM waveform outputs toggle at each compare match (GRB3, GRA3, and GRB4 with
TCNT3) and when the counter is cleared.
See section 10.4.8, Buffer Mode, for details on simultaneously setting reset-synchronized PWM
mode and buffer operation.
TCNT value
GRA3
GRB3
GRA4
GRB4
Counter cleared at GRA3 compare match
Time
TIOCA3
TIOCB3
TIOCA4
TOCXA4
TIOCB4
TOCXB4
Figure 10.32 Reset-Synchronized PWM Mode Operation Example 1
Rev. 7.00 Jan 31, 2006 page 274 of 658
REJ09B0272-0700