SH7032 Datasheet, PDF (53/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 2 CPU
Addressing Mnemonic
Mode
Expression
PC relative Rn
addressing
Effective Addresses Calculation
The effective address is the PC value plus Rn.
PC
+
PC + Rn
Equation
PC + Rn
Immediate
addressing
#imm:8
#imm:8
#imm:8
Rn
The 8-bit immediate data (imm) for the TST, AND, —
OR, and XOR instructions is zero-extended.
The 8-bit immediate data (imm) for the MOV, ADD, —
and CMP/EQ instructions is sign-extended.
Immediate data (imm) for the TRAPA instruction is —
zero-extended and is quadrupled.
2.3.3 Instruction Formats
The instruction format refers to the source operand and the destination operand. The meaning of
the operand depends on the instruction code. Symbols are as follows.
xxxx Instruction code
mmmm Source register
nnnn Destination register
iiii
Immediate data
dddd Displacement
Rev. 7.00 Jan 31, 2006 page 27 of 658
REJ09B0272-0700