SH7032 Datasheet, PDF (676/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix B Pin States
Appendix B Pin States
Table B.1 Pin State In Resets, Power-Down State, and Bus-Released State
Pin State
Category
Pin
Clock
CK
Reset
Power-On Manual
O
O
Power-Down
Standby Sleep
H*¹
O
Bus
Released
O
System control
RES
I
WDTOVF
H
I
I
I
I
H
H*¹
O
O
BREQ
—
I
Z
I
I
BACK
Z
O
Z
O
L
Interrupt
NMI
I
I
I
I
I
IRQ7–IRQ0
—
IRQOUT
—
I
Z
I
I
O
O*¹
H
O
Address bus
A21–A0
H
O
Z
H
Z
Data bus
AD15–AD0
Z
Z
Z
Z
Z
Bus control
DPH,DPL
—
WAIT
I
Z
Z
I*²
Z
Z
Z
I*²
I*²
CS7
—
O
Z
H
Z
CS6–CS0
Z
O
Z
H
Z
RD
H
O
Z
H
Z
WRH (LBS),WRL H
(WR)
RAS
—
O
Z
H
Z
O
O*¹
O
Z
CASH,CASL
—
O
O
O
Z
AH
—
O
Z
H
Z
Direct memory access DREQ0,DREQ1 —
controller (DMAC)
DACK0,DACK1 Z
16-bit integrated timer TIOCA0–TIOCA4 —
pulse unit (ITU)
TIOCB0–TIOCB4 —
TOCXA4, TOCXB4 —
I
Z
I
I
O
K*¹
O
O
I
K*¹
I/O I/O
I
K*¹
I/O I/O
I
K*¹
O
O
Timing pattern
controller (TPC)
TCLKA–TCLKD —
TP15–TP0
—
I
Z
I
I
I
K*¹
O
O
Rev. 7.00 Jan 31, 2006 page 650 of 658
REJ09B0272-0700