SH7032 Datasheet, PDF (110/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 6 User Break Controller (UBC)
6.1.2 Block Diagram
Figure 6.1 shows a block diagram of the user break controller.
Module bus
Bus
interface
BBR
BAMRH
BAMRL
BARH
BARL
Break condition comparator
User break
interrupt
generating
circuit
Interrupt request
UBC
Interrupt controller
BARH, BARL: Break address registers H and L
BAMRH, BAMRL: Break address mask registers H and L
BBR: Break bus cycle register
Figure 6.1 Block Diagram of User Break Controller
Rev. 7.00 Jan 31, 2006 page 84 of 658
REJ09B0272-0700