SH7032 Datasheet, PDF (38/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 1 Overview
Type
Pin No. Pin No.
(PRQP0112 (PTQP0120
Symbol JA-A)
LA-A)
I/O Name and Function
Operating MD2,
mode
MD1,
control MD0
82, 81, 80 87, 86, 85 I
Mode select: Selects the operating mode. Do
not change these inputs while the chip is
operating. The following table lists the possible
operating modes and their corresponding
MD2–MD0 values.
Bus
Operating On-Chip Size in
MD2 MD1 MD0 Mode ROM Area 0
0 0 0 MCU
0 0 1 ^mode
010
Disabled 8 bits
16 bits
Enabled*¹
0 1 1 (Reserved)
100
101
110
1 1 1 PROM
mode*²
Interrupts NMI
76
81
I Nonmaskable interrupt: Nonmaskable interrupt
request signal. The rising or falling edge can be
selected for signal detection.
IRQ0– 66–69, 111, 71–74, 118, I
IRQ7 ^{112, 1, 2 119, 2, 3}
Interrupt request 0–7: Maskable interrupt
request signals. Level input or edge-triggered
input can be selected.
IRQOUT 63
68
O Slave interrupt request output: Indicates
occurrence of an interrupt while the bus is
released.
Address
bus
A21–A0 47–44, 42, 50–47, 45, O
41, 39–32, 44, 42–35,
30–23
33, 32,
29–24
Address bus: Outputs addresses.
Data bus AD15–
AD0
21–16, 14, 22–17, 15, I/O Data bus: 16-bit bidirectional data bus that is
13, 11–4 14, 12–5
multiplexed with the lower 16 bits of the
address bus.
DPH 65
70
I/O Upper data bus parity: Parity data for D15–D8.
DPL
64
69
I/O Lower data bus parity: Parity data for D7–D0.
Notes: 1. Use prohibited in the SH7032 and SH7034 ROM-less versions.
2. Can be used in the SH7034 PROM version.
Rev. 7.00 Jan 31, 2006 page 12 of 658
REJ09B0272-0700