SH7032 Datasheet, PDF (158/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 8 Bus State Controller (BSC)
8.3.5 Area Descriptions
Area 0: Area 0 is an area with address bits A26–A24 set to 000 and an address range of
H'0000000–H'0FFFFFF and H'8000000–H'8FFFFFF. Figure 8.5 shows a memory map of area 0.
Area 0 can be set for use as on-chip ROM space or external memory space with the mode pins
(MD2–MD0). The MD2–MD0 pins also determine the bus width, regardless of the A27 address
bit. When MD2–MD0 are 000, area 0 is an 8-bit external memory space; when they are 001, area
0 is a 16-bit external memory space; and when they are 010, it is a 32-bit on-chip ROM space. In
the SH7032, area 0 can only be used as external memory space since there is no on-chip ROM,
and this last setting is meaningless.
The capacity of the on-chip ROM is 64 kbytes, so bits A23–A16 are ignored in on-chip ROM
space and the shadow is in 64-kbyte units. The CS0 signal is disabled.
In external memory space, the A23 and A22 bits are not output and the shadow is in 4-Mbyte
units. When external memory space is accessed, the CS0 signal is valid. The external memory
space has a long wait function, so between 1 and 4 states can be selected for the number of long
waits inserted into the bus cycle using the area 0 and 2 long wait insertion bits (A02LW1,
A02LW0) of wait state controller 3 (WCR3).
Rev. 7.00 Jan 31, 2006 page 132 of 658
REJ09B0272-0700