SH7032 Datasheet, PDF (350/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 11 Programmable Timing Pattern Controller (TPC)
Bits 5 and 4—Group 2 Compare Match Select 1 and 0 (G2CMS1 and G2CMS0): G2CMS1
and G2CMS0 select the ITU channel that triggers TPC output group 2 (TP11–TP8).
Bit 5:
G2CMS1
0
Bit 4:
G2CMS0
0
1
1
0
1
Description
TPC output group 2 (TP11–TP18) output is triggered by compare match
in ITU channel 0
TPC output group 2 (TP11–TP18) output is triggered by compare match
in ITU channel 1
TPC output group 2 (TP11–TP18) output is triggered by compare match
in ITU channel 2
TPC output group 2 (TP11–TP18) output is triggered by compare match
in ITU channel 3
(Initial value)
Bits 3 and 2—Group 1 Compare Match Select 1 and 0 (G1CMS1 and G1CMS0): G1CMS1
and G1CMS0 select the ITU channel that triggers TPC output group 1 (TP7–TP4).
Bit 3:
G1CMS1
0
Bit 2:
G1CMS0
0
1
1
0
1
Description
TPC output group 1 (TP7–TP4) output is triggered by compare match in
ITU channel 0
TPC output group 1 (TP7–TP4) output is triggered by compare match in
ITU channel 1
TPC output group 1 (TP7–TP4) output is triggered by compare match in
ITU channel 2
TPC output group 1 (TP7–TP4) output is triggered by compare match in
ITU channel 3
(Initial value)
Rev. 7.00 Jan 31, 2006 page 324 of 658
REJ09B0272-0700