SH7032 Datasheet, PDF (430/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Serial Communication Interface (SCI)
Error handling
No
ORER = 1?
Yes
Overrun error handling
Clear ORER bit in SSR to 0
End
Figure 13.18 Sample Flowchart for Serial Receiving (cont)
Receive direction
Serial
clock
Serial
data
Bit 7 Bit 0
Bit 7 Bit 0 Bit 1
Bit 6 Bit 7
RDRF
ORER
RXI interrupt handler
RXI request ^{reads data in RDR}
and clears RDRF to 0
RXI request
1 frame
Overrun
error, ERI
request
Figure 13.19 Example of SCI Receive Operation
In receiving, the SCI operates as follows:
1. The SCI synchronizes with serial clock input or output and initializes internally.
2. Receive data is shifted into RSR in order from the LSB to the MSB. After receiving the data,
the SCI checks that RDRF is 0 so that receive data can be loaded from RSR into RDR. If this
check passes, the SCI sets RDRF to 1 and stores the received data in RDR. If the check does
Rev. 7.00 Jan 31, 2006 page 404 of 658
REJ09B0272-0700