SH7032 Datasheet, PDF (69/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 2 CPU
Instruction Code
Fx: 0000
Fx: 0001
MSB
LSB MD: 00
MD: 01
0100 Rn
Fx 0011 STC.L
SR,@–Rn
STC.L
GBR,@–Rn
0100 Rn
Fx 0100 ROTL Rn
0100 Rn
Fx 0101 ROTR Rn
CMP/PL Rn
0100 Rm Fx 0110 LDS.L
@Rm+,MACH
LDS.L
@Rm+,MACL
0100 Rm Fx 0111 LDC.L
@Rm+,SR
LDC.L
@Rm+,GBR
0100 Rn
Fx 1000 SHLL2 Rn
SHLL8 Rn
0100 Rn
Fx 1001 SHLR2 Rn
SHLR8 Rn
0100 Rm Fx 1010 LDS Rm,MACH LDS Rm,MACL
0100 Rm/Rn Fx 1011 JSR @Rm
TAS.B @Rn
0100 Rm Fx 1100
0100 Rm Fx 1101
0100 Rn
Fx 1110 LDC Rm,SR LDC Rm,GBR
0100 Rn
Rm 1111 MAC.W @Rm+,@Rn+
0101 Rn
Rm disp MOV.L @(disp:4,Rm),Rn
0110 Rn
Rm 00MD MOV.B @Rm,Rn MOV.W @Rm,Rn
0110 Rn
Rm 01MD MOV.B @Rm+,Rn MOV.W @Rm+,Rn
0110 Rn
Rm 10MD SWAP.B
Rm,Rn
SWAP.W
Rm,Rn
0110 Rn
Rm 11MD EXTU.B Rm,Rn EXTU.W Rm,Rn
0111 Rn
imm
ADD #imm:8,Rn
1000 00MD Rn
disp MOV.B R0, MOV.W R0,
@(disp:4,Rn) @(disp:4,Rn)
1000 01MD Rm
disp MOV.B
@(disp:4,
Rm),R0
MOV.W
@(disp:4,
Rm),R0
1000 10MD
imm/disp CMP/EQ
#imm:8,R0
BT disp:8
1000 11MD imm/disp
1001 Rn
disp
MOV.W @(disp:8,PC),Rn
1010
disp
BRA disp:12
1011
disp
BSR disp:12
Fx: 0010
MD: 10
STC.L
VBR,@–Rn
ROTCL Rn
ROTCR Rn
LDS.L
@Rm+,PR
LDC.L
@Rm+,VBR
SHLL16 Rn
SHLL16 Rn
LDS Rm,PR
JMP @Rm
LDC Rm,VBR
MOV.L @Rm,Rn
MOV.L @Rm+,Rn
NEGC Rm,Rn
EXTS.B Rm,Rn
Fx: 0011–1111
MD: 11
MOV Rm,Rn
NOT Rm,Rn
NEG Rm,Rn
EXTS.W Rm,Rn
BF disp:8
Rev. 7.00 Jan 31, 2006 page 43 of 658
REJ09B0272-0700