SH7032 Datasheet, PDF (365/687 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 12 Watchdog Timer (WDT)
Section 12 Watchdog Timer (WDT)
12.1 Overview
The SuperH microcomputer has a one-channel watchdog timer (WDT) for monitoring system
operations. If the system becomes uncontrolled and the timer counter overflows without being
rewritten correctly by the CPU, an overflow signal (WDTOVF) is output externally. The WDT
can simultaneously generate an internal reset signal for the entire chip.
When this watchdog function is not needed, the WDT can be used as an interval timer. In the
interval timer operation, an interval timer interrupt is generated at each counter overflow. The
WDT is also used in recovering from standby mode.
12.1.1 Features
WDT features are listed below:
• Watchdog timer mode interval timer mode can be selected.
• Outputs WDTOVF in or watchdog timer mode. When the counter overflows in watchdog timer
mode, overflow signal WDTOVF is output externally. It is possible to select whether or not to
reset the chip internally when this happens. Either the power-on reset or manual reset signal
can be selected as the internal reset signal.
• Generates interrupts in interval timer mode. When the counter overflows, it generates an
interval timer interrupt.
• Used to clear standby mode.
• Selection of eight counter clock sources
Rev. 7.00 Jan 31, 2006 page 339 of 658
REJ09B0272-0700