PIC18LF24K Datasheet, PDF (96/594 Pages) –

PIC18(L)F26/45/46K40
10.2 Register Definitions: Stack Pointer
REGISTER 10-1: STKPTR: STACK POINTER REGISTER
U-0
U-0
U-0
R/W-0
R/W-0
—
—
—
bit 7
R/W-0
STKPTR<4:0>
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented
‘0’ = Bit is cleared
C = Clearable only bit
x = Bit is unknown
bit 7-5
bit 4-0
Unimplemented: Read as ‘0’
STKPTR<4:0>: Stack Pointer Location bits
10.2.1
STACK OVERFLOW AND
UNDERFLOW RESETS
Device Resets on Stack Overflow and Stack Underflow
conditions are enabled by setting the STVREN bit in
Configuration Register 4L. When STVREN is set, a Full
or Underflow condition will set the appropriate STKOVF
or STKUNF bit and then cause a device Reset. When
STVREN is cleared, a Full or Underflow condition will
set the appropriate STKOVF or STKUNF bit but not
cause a device Reset. The STKOVF or STKUNF bits
are cleared by the user software or a Power-on Reset.
10.2.2 FAST REGISTER STACK
A fast register stack is provided for the Status, WREG
and BSR registers, to provide a “fast return” option for
interrupts. The stack for each register is only one level
deep and is neither readable nor writable. It is loaded
with the current value of the corresponding register
when the processor vectors for an interrupt. All inter-
rupt sources will push values into the stack registers.
The values in the registers are then loaded back into
their associated registers if the RETFIE, FAST
instruction is used to return from the interrupt.
If both low and high priority interrupts are enabled, the
stack registers cannot be used reliably to return from
low priority interrupts. If a high priority interrupt occurs
while servicing a low priority interrupt, the stack register
values stored by the low priority interrupt will be
overwritten. In these cases, users must save the key
registers by software during a low priority interrupt.
If interrupt priority is not used, all interrupts may use the
fast register stack for returns from interrupt. If no
interrupts are used, the fast register stack can be used
to restore the STATUS, WREG and BSR registers at
the end of a subroutine call. To use the fast register
stack for a subroutine call, a CALL label, FAST
instruction must be executed to save the STATUS,
WREG and BSR registers to the fast register stack. A
RETURN, FAST instruction is then executed to restore
these registers from the fast register stack.
Example 10-1 shows a source code example that uses
the fast register stack during a subroutine call and
return.
EXAMPLE 10-1:
CALL SUB1, FAST


FAST REGISTER STACK
CODE EXAMPLE
;STATUS, WREG, BSR
;SAVED IN FAST REGISTER
;STACK
SUB1 

RETURN, FAST
;RESTORE VALUES SAVED
;IN FAST REGISTER STACK
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 96